DocumentCode
2293718
Title
Minimizing the search space for computing exact worst-case delays of AFDX periodic flows
Author
Adnan, Muhammad ; Scharbarg, Jean-Luc ; Fraboul, Christian
Author_Institution
IRIT, Univ. de Toulouse, Toulouse, France
fYear
2011
fDate
15-17 June 2011
Firstpage
294
Lastpage
301
Abstract
AFDX (Avionics Full Duplex Switched Ethernet) standardized as ARINC 664 is a major upgrade for avionics systems. Guarantees on worst case end-to-end communication delays are required for certification purposes. These guarantees are obtained thanks to safe upper bounds computed by Network Calculus and Trajectory Approaches. Indeed, up to now, the computation of an exact worst case delay is intractable, except for very small configurations (less than 10 virtual links (VLs)). This paper proposes an algorithm which significantly increases the size of the configuration for which an exact worst case delay can be obtained (up to 50 VLs). This is achieved, thanks to a drastic reduction of the search space. For larger configurations (up to 100 VLs) the algorithm can be adapted to obtain reachable values for the end-to-end delay which are close to the exact worst case. Generalization to industrial configurations (more than 1000 flows) is under way.
Keywords
avionics; delays; local area networks; multi-access systems; search problems; switching networks; AFDX periodic flow; ARINC 664 standard; avionics full duplex switched Ethernet; search space minimization; virtual links; worst case end-to-end communication delay; Aerospace electronics; Calculus; Computational modeling; Context; Delay; Silicon; Upper bound; AFDX network; Guided simulation; Schedulability analysis; Worst case delay analysis;
fLanguage
English
Publisher
ieee
Conference_Titel
Industrial Embedded Systems (SIES), 2011 6th IEEE International Symposium on
Conference_Location
Vasteras
Print_ISBN
978-1-61284-818-1
Electronic_ISBN
978-1-61284-819-8
Type
conf
DOI
10.1109/SIES.2011.5953673
Filename
5953673
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