DocumentCode :
2295270
Title :
An Efficient MMSE Equalizer Implementation for 4Ã\x974 MIMO-OFDM Systems in Frequency Selective Fast Varying Channels
Author :
Boher, Laurent ; Rabineau, Rodrigue ; Hélard, Maryline
Author_Institution :
France Telecom, Cesson-Sevigne
fYear :
2007
fDate :
3-7 Sept. 2007
Firstpage :
1
Lastpage :
5
Abstract :
In this paper a FPGA implementation of a 4 times 4 MIMO MMSE Equalizer based on the QR factorization technique is presented. Considering fast varying channels a new filter is computed at each new channel realization thanks to an efficient architecture of matrix triangularization. The QR decomposition is performed with only 6 unrolled coordinate rotation digital computer (CORDIC) operators, which are efficiently exploited to minimize the latency of computation. Soft LLR obtained in output of the equalizer are validated on an FPGA hardware bench including a 4 times 4 Rayleigh fading channel and turbo- coding.
Keywords :
MIMO communication; OFDM modulation; Rayleigh channels; least mean squares methods; matrix inversion; turbo codes; 4X4 MIMO-OFDM systems; MMSE equalizer; QR factorization technique; Rayleigh fading channel; coordinate rotation digital computer; frequency selective fast varying channels; matrix triangularization; turbo coding; Computer architecture; Delay; Equalizers; Fading; Field programmable gate arrays; Filters; Frequency; Hardware; MIMO; Matrix decomposition; FPGA hardware implementation; MIMO equalization;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Personal, Indoor and Mobile Radio Communications, 2007. PIMRC 2007. IEEE 18th International Symposium on
Conference_Location :
Athens
Print_ISBN :
978-1-4244-1144-3
Electronic_ISBN :
978-1-4244-1144-3
Type :
conf
DOI :
10.1109/PIMRC.2007.4394377
Filename :
4394377
Link To Document :
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