Title :
Behavioral model of a 1.8 V 6b CMOS flash ADC based on device parameters
Author :
Pennell, M.J. ; Hasan, M. ; Allee, D.R. ; Xie, W.
Author_Institution :
Motorola SPS, Tempe, AZ, USA
Abstract :
A hierarchical behavioral model of a submicron 6 bit CMOS flash analog to digital converter is presented. Circuit parameters are extracted from process dependent device data using an extension of the g m/ID methodology for use in the behavioral model. In using this approach, the model will track changes in physical device geometries without the need for re-characterization. The comparator model is validated against SPICE and system level simulation results are presented for the full converter
Keywords :
CMOS integrated circuits; SPICE; analogue-digital conversion; circuit analysis computing; digital simulation; integrated circuit modelling; network parameters; 1.8 V; 6 bit; CMOS flash ADC; SPICE; circuit parameter extraction; comparator model; device parameters; gm/ID methodology; hierarchical behavioral model; physical device geometries; process dependent device data; system level simulation; Analog-digital conversion; CMOS process; Circuit simulation; Data mining; Decoding; Geometry; SPICE; Semiconductor device modeling; Solid modeling; Trademarks;
Conference_Titel :
Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on
Print_ISBN :
0-7803-3583-X
DOI :
10.1109/ISCAS.1997.621446
