Enhanced ATAMM for increased throughput performance of multicomputer data flow architectures

Author

Jones, R.L. ; Hayes, P.J. ; Andrews, A.M. ; Som, S. ; Stoughton, J.W. ; Mielke, R.R.

Author_Institution

Div. of Inf. Syst., NASA Langley Res. Center, Hampton, VA, USA

fYear

1991

fDate

20-24 May 1991

Firstpage

238

Abstract

The algorithm to architecture mapping model (ATAMM) is a Petri-net-based model which provides a strategy for periodic execution of a class of real-time algorithms on multicomputer data flow architectures. The problem domain of particular interest is the execution of large-grained, decision-free algorithms on homogeneous processing elements. Design techniques are discussed and performance measurements are defined. A multiple-graph execution strategy is shown to increase throughput performance. It is shown that the same increase in performance is attainable with minor modifications to the existing ATAMM

Keywords

Petri nets; algorithm theory; digital simulation; multiprocessing systems; parallel algorithms; parallel architectures; performance evaluation; ATAMM; Petri-net-based model; algorithm to architecture mapping model; decision-free algorithms; multicomputer data flow architectures; multiple-graph execution strategy; performance measurements; real-time algorithms; throughput performance; Analytical models; Circuits; Computer architecture; Concurrent computing; Data engineering; Information systems; Measurement; Military computing; Performance analysis; Throughput;

fLanguage

English

Publisher

ieee

Conference_Titel

Aerospace and Electronics Conference, 1991. NAECON 1991., Proceedings of the IEEE 1991 National

Conference_Location

Dayton, OH

Print_ISBN

0-7803-0085-8

Type

conf

DOI

10.1109/NAECON.1991.165752

Filename

165752