Title :
Quantum device model based super pass gate for multiple-valued digital systems
Author :
Deng, Xiaowei ; Hanyu, Takahiro ; Kameyama, Michitaka
Author_Institution :
Graduate Sch. of Inf. Sci., Tohoku Univ., Sendai, Japan
Abstract :
The investigation of the device functions required from the systems point of view is important for the development of the next generation of VLSI devices and systems. A super pass transistor (SPT) model is presented as a quantum device candidate for future multiple-valued VLSI systems. Since it has the powerful capability of multiple-signal-level detection, the SPT will be useful for implementing highly compact multiple-valued VLSI systems. To efficiently exploit the functionality of the SPT, a super pass gate (SP-gate) corresponding to a single SPT is proposed as a multiple-valued universal logic module. Mathematical properties of the SP-gate and a method for designing SP-gate networks are described. An application of SP-gates to a multiple-valued image processing system is also demonstrated
Keywords :
MOS logic circuits; VLSI; multivalued logic circuits; quantum interference devices; semiconductor device models; NMOS circuit; VLSI devices; multiple-signal-level detection; multiple-valued VLSI systems; multiple-valued digital systems; multiple-valued image processing system; multiple-valued universal logic module; quantum device model; super pass gate; super pass transistor; Digital systems; HEMTs; Logic; MODFETs; Power system modeling; Quantum computing; Quantum dots; Signal generators; Switches; Very large scale integration;
Conference_Titel :
Multiple-Valued Logic, 1995. Proceedings., 25th International Symposium on
Conference_Location :
Bloomington, IN
Print_ISBN :
0-8186-7118-1
DOI :
10.1109/ISMVL.1995.513515