Title :
Smart antenna receiver for GSM/DCS system based on single chip solution
Author :
Girola, U. ; Picciriello, A. ; Vincenzoni, D.
Author_Institution :
Italtel Soc. Italiana Telecommun. SpA, Milan, Italy
Abstract :
This paper presents a single chip implementation of a space-time algorithm for co-channel interference (CCI) and intersymbol interference (ISI) reduction in GSM/DCS systems. The temporal channel for the Viterbi receiver and the beamformer weights for the CCI rejection are estimated jointly by optimizing a suitable cost function for separable space-time channels. By taking into account of the current integration capabilities provided by the FPGA (field programmable gate array), the feasibility of a single chip JSTE solution based on a three-processor architecture for carrier beamforming, equalization and demodulation is demonstrated
Keywords :
adaptive antenna arrays; array signal processing; cellular radio; cochannel interference; demodulation; digital radio; equalisers; field programmable gate arrays; interference suppression; intersymbol interference; radio receivers; space-time adaptive processing; CCI reduction; FPGA; GSM/DCS system; ISI reduction; Viterbi receiver; beamformer weights; carrier beamforming; co-channel interference; cost function; demodulation; equalization; field programmable gate array; intersymbol interference; separable space-time channels; single chip JSTE; single chip implementation; smart antenna receiver; space-time algorithm; temporal channel; three-processor architecture; Array signal processing; Cost function; Distributed control; Field programmable gate arrays; GSM; Interchannel interference; Intersymbol interference; Radiofrequency interference; Receiving antennas; Viterbi algorithm;
Conference_Titel :
Acoustics, Speech, and Signal Processing, 2000. ICASSP '00. Proceedings. 2000 IEEE International Conference on
Conference_Location :
Istanbul
Print_ISBN :
0-7803-6293-4
DOI :
10.1109/ICASSP.2000.860082
