DocumentCode :
2296302
Title :
A Low-Leakage Single-Ended 6T SRAM Cell
Author :
Solanki, S. ; Frustaci, F. ; Corsonello, P.
Author_Institution :
Dept. of Electron., Univ. of Calabria, Rende, Italy
fYear :
2010
fDate :
19-21 Nov. 2010
Firstpage :
698
Lastpage :
702
Abstract :
A new six transistor (6T) SRAM cell is presented in this paper for low leakage design. In the proposed SRAM cell, dual threshold voltage and dual power supply techniques are used in order to reduce leakage power dissipation. The new cell operates at 0.6 V in standby mode and at 1V during read operation. The proposed cell has been compared to the conventional 6T-SRAM, using the 65 nm technology. Experimental results show leakage power consumption is reduced by up to 72.7%.
Keywords :
SRAM chips; dual power supply; dual threshold voltage; leakage power consumption; leakage power dissipation; low-leakage 6T SRAM Cell; single-ended 6T SRAM Cell; six transistor SRAM cell; voltage 0.6 V; voltage 1 V; Low leakage; SRAM cell;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Emerging Trends in Engineering and Technology (ICETET), 2010 3rd International Conference on
Conference_Location :
Goa
ISSN :
2157-0477
Print_ISBN :
978-1-4244-8481-2
Electronic_ISBN :
2157-0477
Type :
conf
DOI :
10.1109/ICETET.2010.102
Filename :
5698416
Link To Document :
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