DocumentCode :
2296325
Title :
Impact of Random Process Variations on Different 65nm SRAM Cell Topologies
Author :
Kansal, Sumit ; Lanuzza, Marco ; Corsonello, Pasquale
Author_Institution :
Dept. of Electron., Univ. of Calabria, Rende, Italy
fYear :
2010
fDate :
19-21 Nov. 2010
Firstpage :
703
Lastpage :
706
Abstract :
In this paper, the influence of random process variations on different low leakage SRAM topologies has been analyzed. This analysis was performed through extensive Monte Carlo simulations and exploiting a commercial 65 nm technology. Simulation results demonstrate that the Low Vdd SRAM cell presents the best trade-off between performances and robustness against random process variations.
Keywords :
Monte Carlo methods; SRAM chips; Monte Carlo simulation; low leakage SRAM cell topology; random process variation; robustness; Low Leakage; Monte Carlo Simulations; Random Process variation; SRAM cell;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Emerging Trends in Engineering and Technology (ICETET), 2010 3rd International Conference on
Conference_Location :
Goa
ISSN :
2157-0477
Print_ISBN :
978-1-4244-8481-2
Electronic_ISBN :
2157-0477
Type :
conf
DOI :
10.1109/ICETET.2010.19
Filename :
5698417
Link To Document :
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