Design of Dynamic Synapse Circuits with VLSI Design Approach

Dynamic properties of neural networks using dynamic neuron can be implemented with the analog dynamic synapse. The proposed circuit has few CMOS transistors but imitates well the dynamic properties of depressing synapses. Dynamical synapse increases the computational power of the neuronal network. An approach towards design of depressing synapse is presented in this paper towards achieving excitatory and inhibitory postsynaptic potential. This is achieved just by means of adjusting control voltages. In this paper a model of a depressing synapse circuit is presented. This synapse can be classified into excitatory and inhibitory synapse depending upon the charging and discharging of the membrane potential of the postsynaptic neuron. The addition of dynamic synapses to neural networks increases the computational power of such networks, especially in processing time-varying inputs. The network can be used in active pattern recognition based on extracted information about the firing frequency from input information.