DocumentCode
2296722
Title
Quantum-Corrected Simulation of Complementary Nanowire Tunneling Transistors of 5 nm Gate-Length
Author
Heigl, Alexander ; Wachutka, Gerhard
Author_Institution
Inst. for Phys. of Electrotechnol., Tech. Univ. Munchen, Munchen
fYear
2008
fDate
12-16 Oct. 2008
Firstpage
115
Lastpage
118
Abstract
Using numerical device simulation we investigated in detail the operational behavior of a cylindrical nanowire tunneling transistor (TFET) and the effect of quantum confinement on its characteristics, with a strong focus on the scalability of such devices. Among others, we discuss the potential device improvements by considering alternative materials for the gate-stack and the source region.
Keywords
MOSFET; nanowires; semiconductor device models; tunnelling; complementary nanowire tunneling transistors; cylindrical nanowire tunneling transistor; numerical device simulation; quantum confinement; quantum-corrected simulation; scalability; size 5 nm; Charge carrier processes; Doping; Nanoscale devices; Numerical simulation; Poisson equations; Potential well; Semiconductor devices; Transistors; Tunneling; Variable speed drives;
fLanguage
English
Publisher
ieee
Conference_Titel
Advanced Semiconductor Devices and Microsystems, 2008. ASDAM 2008. International Conference on
Conference_Location
Smolenice
Print_ISBN
978-1-4244-2325-5
Electronic_ISBN
978-1-4244-2326-2
Type
conf
DOI
10.1109/ASDAM.2008.4743294
Filename
4743294
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