Complexity Evaluation of a Re-Configurable Butterfly with FPGA for Software Radio Systems

In this paper, we investigate the complexity of a common FFT-like butterfly capable of carrying out both modular and complex arithmetic operations. This idea of resource sharing stands for software radio systems where re-configurability is of major importance for an optimal multi-standards terminal design. By taking into account, in the implementation on STRATIX II devices, the required number of logic blocks and the total execution time, this re-configurable butterfly can achieve a performance-to-cost ratio gain around 20% over the basic duplicated solution where no re-configuration is considered.