• DocumentCode
    2297066
  • Title

    Three High Performance Architectures in the Parallel APMC Boat

  • Author

    Hamidouche, Khaled ; Borghi, Alexandre ; Esterie, Pierre ; Falcou, Joel ; Peyronnet, Sylvain

  • Author_Institution
    LRI, Univ. Paris-Sud, Orsay, France
  • fYear
    2010
  • fDate
    Sept. 30 2010-Oct. 1 2010
  • Firstpage
    20
  • Lastpage
    27
  • Abstract
    Approximate probabilistic model checking, and more generally sampling based model checking methods, proceed by drawing independent executions of a given model and by checking a temporal formula on these executions. In theory, these methods can be easily massively parallelized, but in practice one has to consider, for this purpose, important aspects such as the communication paradigm, the physical architecture of the machine, etc. Moreover, being able to develop multiple implementations of this algorithm on architectures as different as a cluster or many-cores requires various levels of expertise that may be problematic to gather. In this paper we propose to investigate the runtime behavior of approximate probabilistic model checking on various state of the art parallel machines - clusters, SMP, hybrid SMP clusters and the Cell processor - using a high-level parallel programming tool based on the Bulk Synchronous Parallelism paradigm to quickly instantiate model checking problems over a large variety of parallel architectures. Our conclusion assesses the relative efficiency of these architectures with respect to the algorithm classes and promotes guidelines for further work on parallel APMC implementation.
  • Keywords
    approximation theory; formal verification; microprocessor chips; multiprocessing systems; parallel architectures; parallel machines; parallel programming; temporal logic; Cell processor; approximate probabilistic model checking; bulk synchronous parallelism; high performance architecture; high-level parallel programming tool; hybrid SMP cluster; many-core architecture; parallel APMC boat; parallel architecture; parallel machine; sampling based model checking method; symmetric multiprocessor;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel and Distributed Methods in Verification, 2010 Ninth International Workshop on, and High Performance Computational Systems Biology, Second International Workshop on
  • Conference_Location
    Enschede
  • Print_ISBN
    978-0-7695-4265-2
  • Type

    conf

  • DOI
    10.1109/PDMC-HiBi.2010.12
  • Filename
    5698466