A tunable 300–800MHz RF-sampling receiver achieving 60dB harmonic rejection and 0.8dB minimum NF in 65nm CMOS

Author

Ru, Z. ; Klumperink, E. ; Saavedra, C. ; Nauta, B.

Author_Institution

Univ. of Twente, Enschede, Netherlands

fYear

2009

fDate

7-9 June 2009

Firstpage

21

Lastpage

24

Abstract

A 300-800 MHz CMOS radio receiver aiming at software-defined radio is proposed. It exploits an LNA preceded by a tunable LC filter with one external coil to achieve voltage amplification for low NF and low-pass filtering to improve the 3^rd and 5^th harmonic rejection of an RF-sampling receiver to > 60dB. The balun-LNA provides partial IM3 compensation, to drive a wideband sampling downconverter. The measured gain is 22-28dB while NF ranges from 0.8-4.3dB. The core consumes 6mW and clock takes 12mW.

Keywords

CMOS integrated circuits; baluns; harmonics; low-pass filters; radio receivers; radiofrequency filters; software radio; CMOS radio receiver; RF-sampling receiver; balun-LNA; frequency 300 MHz to 800 MHz; gain 0.8 dB to 4.3 dB; gain 22 dB to 28 dB; harmonic rejection; low-pass filtering; partial IM3 compensation; power 12 mW; power 6 mW; size 65 nm; software-defined radio; tunable LC filter; voltage amplification; wideband sampling downconverter; Coils; Filtering; Gain measurement; Low pass filters; Low voltage; Noise measurement; Power harmonic filters; Receivers; Sampling methods; Wideband; CMOS; LC filter; LNA; cognitive radio; distortion; downconverter; harmonic rejection; matching; nonlinearity; receiver; sampling; sampling receiver; software-defined radio; tunable filter;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio Frequency Integrated Circuits Symposium, 2009. RFIC 2009. IEEE

Conference_Location

Boston, MA

ISSN

1529-2517

Print_ISBN

978-1-4244-3377-3

Electronic_ISBN

1529-2517

Type

conf

DOI

10.1109/RFIC.2009.5135481

Filename

5135481