• DocumentCode
    2297404
  • Title

    Designing Robust GALS Circuits with Triple Modular Redundancy

  • Author

    Lechner, Jakob

  • fYear
    2012
  • fDate
    8-11 May 2012
  • Firstpage
    227
  • Lastpage
    236
  • Abstract
    In this paper we describe a new method for building fault-tolerant globally asynchronous locally synchronous (GALS) systems based on triple modular redundancy. In order to avoid a single point of failure, we present a redundant clocking scheme for providing independent clock signals to the triplicated GALS modules. Independent clocking, however, requires the use of an alternative recovery mechanism, which performs voting only at certain safe synchronization points. An implementation of an asynchronous state machine controlling this recovery process is given and thoroughly evaluated concerning its robustness against soft-errors. With the help of model checking the fault-resilience of the proposed circuit is formally verified. A case study, including a description for the design automation of GALS-based TMR systems, shows the viability of the new architecture. The resulting solution offers low area overheads and a competitive performance compared to standard TMR approaches.
  • Keywords
    asynchronous circuits; logic design; asynchronous state machine; fault-tolerant globally asynchronous locally synchronous systems; redundant clocking scheme; robust GALS circuits design; soft-errors; triple modular redundancy; Clocks; Delay; Generators; Logic gates; Synchronization; System recovery; Tunneling magnetoresistance; Asynchronous circuit design; Fault-tolerance; GALS; Redundant clocking; TMR;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Dependable Computing Conference (EDCC), 2012 Ninth European
  • Conference_Location
    Sibiu
  • Print_ISBN
    978-1-4673-0938-7
  • Type

    conf

  • DOI
    10.1109/EDCC.2012.25
  • Filename
    6214778