Practical design and performance evaluation of completion detection circuits

To achieve the goal of designing high performance self-timed circuits, one of the key factors is to design a fast completion detection circuit, detecting the completion of the self-timed circuit. Some recent work proposed by Wuu and Yun on completion detection circuits is reviewed. A new design of high performance completion detection circuits for dual-rail self-timed circuits is presented. The results of our SPICE simulation show that our computation-completion detection circuit is more than 9 times faster than Wuu´s and Yun´s, and our reset-completion detection circuits is 2.7 times faster than Wuu´s