• DocumentCode
    2297556
  • Title

    Evaluating the performance of active cache management schemes

  • Author

    Tam, Edward S. ; Rivers, Jude A. ; Srinivasan, Vijayalakshmi ; Tyson, Gary S. ; Davidson, Edward S.

  • Author_Institution
    Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA
  • fYear
    1998
  • fDate
    5-7 Oct 1998
  • Firstpage
    368
  • Lastpage
    375
  • Abstract
    In this paper we examine the performance of two multi-lateral cache schemes; one makes block allocation decisions correlated to the reference behavior of regions of memory (NTS), the other correlated to the reference behavior of memory accessing instructions (PCS). To determine the efficacy of exploiting these reference correlation schemes to improve cache management, we compare the performance of these multi-lateral schemes to a multi-lateral configuration that uses a near-optimal (but non-implementable) replacement policy, pseudo-opt. In addition to miss ratio, three metrics are used to evaluate the performance of these schemes, relative to pseudo-opt: 1) prediction accuracy in determining reference locality, 2) actual usage accuracy, i.e. how likely a block in an implementable scheme and the near-optimal scheme exhibit the same reuse characteristic, and 3) tour length of a line in the cache. Results show that while the NTS and PCS schemes outperform traditional cache management schemes, they fall short of the pseudo-opt performance; this is due to their simple prediction strategies and because their active management addresses only block allocation and not replacement
  • Keywords
    cache storage; performance evaluation; storage management; NTS; PCS; block allocation; block allocation decisions; cache management; memory accessing instructions; multi-lateral cache; performance; prediction strategies; Accuracy; Cache memory; Clocks; Computer architecture; Information management; Laboratories; Personal communication networks; Rivers; Time measurement; Velocity measurement;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design: VLSI in Computers and Processors, 1998. ICCD '98. Proceedings. International Conference on
  • Conference_Location
    Austin, TX
  • ISSN
    1063-6404
  • Print_ISBN
    0-8186-9099-2
  • Type

    conf

  • DOI
    10.1109/ICCD.1998.727076
  • Filename
    727076