Characterisation and macro-modeling of patterned micronic and nano-scale dummy metal-fills in integrated circuits

In this paper, a wideband characterization and macro-modeling of patterned micronic and nano-scale dummy metal-fills is presented. Impacts of patterned dummy metal-fill topologies including square, cross, vertical and horizontal shaped arrays on electrical performances (isolation/coupling, attenuation, guiding properties, etc...) are investigated. The validity of the proposed macro-modeling methodology is demonstrated by comparison with high frequency measurements of dedicated carrier structures including on-chip interconnects and RF inductive loops. An original extraction approach, based on local ground concept, is proposed to capture high frequency behaviour of dummy metal-fill in physics-based compact broadband SPICE model. The RLC parameters are accurately derived using fully scalable closed-form semi-analytical expressions.