Title :
Energy Efficiency of Multi-bit delta-sigma Modulators Using Inverter-based Integrators
Author :
Kotani, Hiroaki ; Yaguchi, Ryoto ; Waho, Takao
Author_Institution :
Dept. of Inf. & Commun. Sci., Sophia Univ., Tokyo, Japan
Abstract :
Energy efficiency of multi-bit ΔΣ modulators has been investigated in terms of a normalized power dissipation, which is commonly referred to as the figure-of-merit (FOM). The multi-bit modulators are designed by adding a multi-level comparator and feedback path to a conventional inverter-based modulator. The FOM is estimated by transistor-level circuit simulation assuming a 0.18-μm standard CMOS technology. In the present 3-bit modulator, the FOM is improved by more than a factor of two compared with a conventional 1-bit one. By using the multi-level comparator, the smaller quantization error reduces the settling time in the integrators, and then improves the energy efficiency.
Keywords :
CMOS integrated circuits; comparators (circuits); delta-sigma modulation; invertors; 3-bit modulator; CMOS technology; FOM; energy efficiency; feedback path; figure-of-merit; inverter-based integrator; inverter-based modulator; multibit delta-sigma modulator; multilevel comparator; normalized power dissipation; quantization error; size 0.18 micron; transistor-level circuit simulation; Capacitance; Frequency modulation; Inverters; MOSFET circuits; Power demand; Signal to noise ratio; FOM; Modulator; Multi-bit; multi-level;
Conference_Titel :
Multiple-Valued Logic (ISMVL), 2012 42nd IEEE International Symposium on
Conference_Location :
Victoria, BC
Print_ISBN :
978-1-4673-0908-0
DOI :
10.1109/ISMVL.2012.66