A New Approach to Online Testing of TGFSOP-based Ternary Toffoli Circuits

Author

Nayeem, N.M. ; Rice, J.E.

Author_Institution

Dept. of Math & Comput. Sci., Univ. of Lethbridge, Lethbridge, AB, Canada

fYear

2012

fDate

14-16 May 2012

Firstpage

315

Lastpage

321

Abstract

Previous work presented a simple technique for converting an ESOP-based Boolean reversible circuit into an online testable circuit. This paper builds on the previous work by extending its application to circuits consisting of cascades of ternary Toffoli gates. The technique is applied to an existing cascade of ternary Toffoli gates, and requires that a single additional line be added to facilitate the propagation of any faults that are identified, as well as modification and/or addition of some gates. The modified circuit can detect online any single-bit errors that occur within the circuit. Experimental results compare very favourably to the only other known approach.

Keywords

Galois fields; logic circuits; logic gates; logic testing; ternary logic; TGFSOP-based ternary Toffoli circuits; faults propagation; online testing; single-bit errors; ternary Galois field sum of products; ternary Toffoli gate cascading; Benchmark testing; Circuit faults; Galois fields; Integrated circuit modeling; Logic gates; Vectors; Ternary circuit; online testing; reversible logic;

fLanguage

English

Publisher

ieee

Conference_Titel

Multiple-Valued Logic (ISMVL), 2012 42nd IEEE International Symposium on

Conference_Location

Victoria, BC

ISSN

0195-623X

Print_ISBN

978-1-4673-0908-0

Type

conf

DOI

10.1109/ISMVL.2012.57

Filename

6214828