DocumentCode :
2298476
Title :
An Integrated 18 GHz fractional-N PLL in SiGe BiCMOS technology for satellite communications
Author :
Herzel, Frank ; Osmany, Sabbir A. ; Schmalz, Klaus ; Winkler, Wolfgang ; Scheytt, J. Christoph ; Podrebersek, Thomas ; Follmann, Rudiger ; Heyer, Heinz-Volker
Author_Institution :
IHP, Frankfurt (Oder), Germany
fYear :
2009
fDate :
7-9 June 2009
Firstpage :
329
Lastpage :
332
Abstract :
We present a single-chip fractional-N PLL for space applications. The design employs a high-current charge pump with optimum output biasing and a low-current charge pump for extension of the tuning range. We show that the extension of the tuning range does not increase phase noise and reference spurs. The PLL is tunable from 17.5 GHz to 18.9 GHz, and the phase noise at 1 MHz offset is below -110 dBc/Hz. Since loop bandwidth and phase noise are almost independent of the output frequency, the design is robust against parameter variations with process, voltage, temperature, and ageing.
Keywords :
BiCMOS integrated circuits; charge pump circuits; phase locked loops; phase noise; satellite communication; BiCMOS technology; fractional-N PLL; frequency 17.5 GHz to 18.9 GHz; high-current charge pump; loop bandwidth; phase noise; satellite communications; BiCMOS integrated circuits; Charge pumps; Communications technology; Germanium silicon alloys; Phase locked loops; Phase noise; Satellite communication; Silicon germanium; Space technology; Tuning; BiCMOS; Dual-loop PLL; Frequency Synthesizer; PVT Tolerance; Satellite Communication; Silicon-Germanium;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Radio Frequency Integrated Circuits Symposium, 2009. RFIC 2009. IEEE
Conference_Location :
Boston, MA
ISSN :
1529-2517
Print_ISBN :
978-1-4244-3377-3
Electronic_ISBN :
1529-2517
Type :
conf
DOI :
10.1109/RFIC.2009.5135551
Filename :
5135551
Link To Document :
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