A digital frequency synthesizer for cognitive radio spectrum sensing applications

Author

Rapinoja, Tapio ; Stadius, Kari ; Xu, Liangge ; Lindfors, Saska ; Kaunisto, Risto ; Pärssinen, Aarno ; Ryynänen, Jussi

Author_Institution

Dept. of Micro- & Nanosci./SMARAD2, Helsinki Univ. of Technol., Espoo, Finland

fYear

2009

fDate

7-9 June 2009

Firstpage

423

Lastpage

426

Abstract

This paper presents a wide-band digital frequency synthesizer architecture targeted for spectrum sensing applications. The proposed digital period synthesizer (DPS) architecture can achieve wide operational bandwidth, extremely high frequency resolution and short settling time with low power and area consumption. The frequency synthesizer was implemented in a 65-nm CMOS process and it occupies 0.12 mm² active area. The frequency range of the synthesizer is from 0.1 GHz to 4.267 GHz with 0.025-5.38 Hz frequency resolution. In this range, the settling time for any arbitrary frequency jump is less than 30 ns. The power consumption ranges from 3.6 to 8.4 mW.

Keywords

cognitive radio; frequency synthesizers; spread spectrum communication; CMOS process; cognitive radio spectrum sensing applications; frequency 0.025 Hz to 5.38 Hz; frequency 0.1 GHz to 4.267 GHz; power 3.6 mW to 8.4 mW; size 65 nm; wideband digital frequency synthesizer; Circuit synthesis; Cognitive radio; Delay; Energy consumption; Frequency conversion; Frequency synthesizers; Phase noise; Protocols; Signal generators; Signal synthesis; Cognitive radio; digital; frequency synthesis; spectrum sensing;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio Frequency Integrated Circuits Symposium, 2009. RFIC 2009. IEEE

Conference_Location

Boston, MA

ISSN

1529-2517

Print_ISBN

978-1-4244-3377-3

Electronic_ISBN

1529-2517

Type

conf

DOI

10.1109/RFIC.2009.5135572

Filename

5135572