Title :
Design procedure of low-noise high-speed adaptive output drivers
Author :
Choy, C.S. ; Chan, C.F. ; Ku, M.H. ; Povazanec, J.
Author_Institution :
Dept. of Electron. Eng., Chinese Univ. of Hong Kong, Shatin, Hong Kong
Abstract :
This paper presents a design procedure of a high-frequency output driver with low power-bus noise and with an architecture which automatically adapts to different loading. In depth analysis of a noise amplitude versus driving power as a first stage of design is included and the theoretical approach is supported by simulation and measurement results of a designed and manufactured device
Keywords :
CMOS digital integrated circuits; driver circuits; integrated circuit design; integrated circuit noise; design procedure; high-frequency output driver; high-speed adaptive output drivers; low-noise output drivers; Current control; Delay; Design engineering; Driver circuits; Frequency; Noise reduction; Power engineering and energy; Protection; Rails; Threshold voltage;
Conference_Titel :
Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on
Print_ISBN :
0-7803-3583-X
DOI :
10.1109/ISCAS.1997.621494
