DocumentCode
2298866
Title
Discrete-state analysis technique for accurate estimation of switching activities in embedded CMOS combinational circuits
Author
Lim, Yong Je ; Soma, Mani
Author_Institution
Dept. of Electr. Eng., Washington Univ., Seattle, WA, USA
Volume
3
fYear
1997
fDate
9-12 Jun 1997
Firstpage
1800
Abstract
This paper proposes a new technique to estimate the transition rates in embedded CMOS combinational circuits based on the state of the synchronized discrete-time logic signal. To aid the estimation of transitional effects when propagation delays are considered, we also propose an enhanced technique to estimate the delay-dependent transition rates at internal circuit nodes based on our previous studies
Keywords
CMOS logic circuits; circuit analysis computing; combinational circuits; delays; integrated circuit reliability; logic CAD; delay-dependent transition rates; discrete-state analysis technique; embedded CMOS combinational circuits; internal circuit nodes; propagation delays; switching activities; synchronized discrete-time logic signal; CMOS logic circuits; Clocks; Combinational circuits; Delay effects; Delay estimation; Frequency synchronization; Propagation delay; Signal analysis; State estimation; Steady-state;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on
Print_ISBN
0-7803-3583-X
Type
conf
DOI
10.1109/ISCAS.1997.621495
Filename
621495
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