Title :
Numeric Function Generators Using Piecewise Arithmetic Expressions
Author :
Nagayama, Shinobu ; Sasao, Tsutomu ; Butler, Jon T.
Author_Institution :
Dept. of Comput. & Network Eng., Hiroshima City Univ., Hiroshima, Japan
Abstract :
This paper proposes new architectures for numeric function generators (NFGs) using piecewise arithmetic expressions. The proposed architectures are programmable, and they realize a wide range of numeric functions. To design an NFG for a given function, we partition the domain of the function into uniform segments, and transform a sub-function in each segment into an arithmetic spectrum. From this arithmetic spectrum, we derive an arithmetic expression, and realize the arithmetic expression with hardware. Since the arithmetic spectrum has many zero coefficients and repeated coefficients, by storing only distinct nonzero coefficients in a table, we can significantly reduce the table size needed to store arithmetic coefficients. Experimental results show that the table size can be reduced to only a small percent of the table size needed to store all the arithmetic coefficients. We also propose techniques to reduce table size further and to improve performance.
Keywords :
digital arithmetic; function generators; programmable logic arrays; arithmetic spectrum; numeric function generator; piecewise arithmetic expression; programmable architecture; Adders; Approximation methods; Computer architecture; Logic functions; Polynomials; Registers; Transforms; nonzero arithmetic coefficients; numeric function generators; piecewise arithmetic expressions; programmable architectures;
Conference_Titel :
Multiple-Valued Logic (ISMVL), 2011 41st IEEE International Symposium on
Conference_Location :
Tuusula
Print_ISBN :
978-1-4577-0112-2
Electronic_ISBN :
0195-623X
DOI :
10.1109/ISMVL.2011.32