Time-Domain Multi-bit DeltaSigma Analog-to-Digital Converter

Author

Kuribayashi, Kazuki ; Machida, Kazuya ; Toyama, Yuji ; Waho, Takao

Author_Institution

Dept. of Inf. & Commun. Sci., Sophia Univ., Tokyo, Japan

fYear

2011

fDate

23-25 May 2011

Firstpage

254

Lastpage

258

Abstract

A multi-bit representation in the time domain has been applied to a ΔΣ analog-to-digital converter (ADC), which consists of an asynchronous ΔΣ modulator (ADSM) and a time-to-digital converter (TDC). Current-mode circuits are included in the ADSM to suppress the variation in the node voltage. The TDC is based on a ring oscillator-based TDC comprised of four stages of differential delay element followed by a counter and a phase detector. The 1st-order noise-shaping was experimentally obtained for the TDC fabricated by using 0.18-μ m standard CMOS technology. A successful operation of the ADC has been obtained by transistor-level circuit simulation.

Keywords

CMOS integrated circuits; counting circuits; modulators; oscillators; phase detectors; sigma-delta modulation; time-domain analysis; transistors; CMOS technology; current-mode circuits; differential delay element; multibit representation; noise-shaping; ring oscillator-based TDC; size 0.18 mum; time-domain multibit ΔΣ analog-to-digital converter; transistor-level circuit simulation; Analog-digital conversion; CMOS integrated circuits; Delay; Modulation; Oscillators; Radiation detectors; Time domain analysis; DeltaSigma; analog-to-digital converter; asynchronous; time-to-digital converter;

fLanguage

English

Publisher

ieee

Conference_Titel

Multiple-Valued Logic (ISMVL), 2011 41st IEEE International Symposium on

Conference_Location

Tuusula

ISSN

0195-623X

Print_ISBN

978-1-4577-0112-2

Electronic_ISBN

0195-623X

Type

conf

DOI

10.1109/ISMVL.2011.31

Filename

5954242