Design of high-speed, wide-band MOS oscillators for monolithic phase-locked loop applications

Methods are presented for the realization of MOS oscillators with multidecade tuning range and GHz top speed. The theory yields transistor-only circuits with robust, digital-like structure. These are relaxation networks capable of high-frequency operation due to the use of parasitic timing capacitors, simplified feedback networks, and submicron-channel transistors. Optimum design solutions exist for both NMOS and CMOS, the latter having inherent advantages such as parasitic `masking´ properties. The digital-and-voltage-controlled oscillators developed are intended for complex monolithic PLL applications