Title :
A study of VLSI architectures for 2-D Discrete Wavelet Transform
Author :
Raj, Krishna ; Vedvrat
Author_Institution :
Dept. of Electron., Harcourt Butler Technol. Inst., Kanpur, India
fDate :
Nov. 29 2010-Dec. 1 2010
Abstract :
In this paper we presented the different VLSI architectures for the computation of 2-D Discrete Wavelet Transform (DWT). These Architectures are based on Recursive Pyramid Algorithm (RPA), Systolic Array architecture and Parallel Filter architecture. A comparative analysis, on the basis of computational complexity and hardware utilization, of these architectures is presented here.
Keywords :
VLSI; discrete wavelet transforms; systolic arrays; 2D discrete wavelet transform; DWT; RPA; VLSI architecture; parallel filter architecture; recursive pyramid algorithm; systolic array architecture; Computer architecture; Discrete wavelet transforms; Filtering algorithms; Hardware; Low pass filters; Very large scale integration; Discrete Wavelet Transform (DWT); JPEG 2000; MRPA; Parallel filter; Pyramidal Algorithm; RPA; Systolic Array;
Conference_Titel :
Power, Control and Embedded Systems (ICPCES), 2010 International Conference on
Conference_Location :
Allahabad
Print_ISBN :
978-1-4244-8543-7
DOI :
10.1109/ICPCES.2010.5698715
