Simulation of vertical Hall sensor in high-voltage CMOS technology

In this paper we present the vertical Hall magnetic sensor using parameters from conventional high-voltage 0.8 μm CMOS technology. Based on process and device simulations with ISE TCAD system, we demonstrate that sensor characteristic are comparable with those in the magnetic sensors fabricated by specialized nonstandard sensor technologies. This was achieved by applying an unconventional doping reduction method. It is demonstrated that deliberate violation of design rules can increase sensitivity without negative influences on the other device characteristics.