• DocumentCode
    2300922
  • Title

    Quantitative Verification of Navigation Model for Reliable Web Applications

  • Author

    Gao, Honghao ; Miao, Huaikou ; Chen, Shengbo ; Mei, Jia

  • Author_Institution
    Sch. of Comput. Eng. & Sci., Shanghai Univ., Shanghai, China
  • fYear
    2011
  • fDate
    23-25 May 2011
  • Firstpage
    204
  • Lastpage
    209
  • Abstract
    Due to the stochastic nature and time constrains, it is important to quantitatively verify the reliability of Web applications as well as the usability. However, the reliability involves different kinds of QoS metrics, which is hard to be verified by the "yes" or "no" assertion in general model checking. This paper proposes a verification approach to analyzing the performance of the navigation model for reliable Web applications, aiming at verifying probabilistic timed specifications in a quantitative way. First, in order to investigate the time constrains and probabilistic behaviors, probabilistic timed automata (PTA) is introduced to improve the on-the-fly navigation model. Then, this work distinguishes the normal states and error states of BLM for assessing the capability of faults detection. Moreover, the discrete transition error locations and time transition error locations are discussed, which are used to evaluate the capability of fault tolerance. Third, to quantitatively verify the reliability properties, Probabilistic Timed Computation Tree Logic (PTCTL) formulae are employed to express the capability of faults detection and fault tolerance, and the probabilistic model checker PRISM is used to perform verification and output the quantitative results. For illustration, a simple audit system of a Web application is exemplified.
  • Keywords
    Internet; fault tolerant computing; probabilistic automata; probabilistic logic; quality of service; QoS metrics; Web applications; discrete transition error locations; fault tolerance; faults detection; general model checking; on-the-fly navigation model; probabilistic timed automata; probabilistic timed computation tree logic formulae; reliability properties; time transition error locations; verification approach; Clocks; Fault tolerance; Fault tolerant systems; Navigation; Probabilistic logic; Thyristors; PTCTL; Probabilistic Timed Automata (PTA); Web application; navigation model; reliability;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computers, Networks, Systems and Industrial Engineering (CNSI), 2011 First ACIS/JNU International Conference on
  • Conference_Location
    Jeju Island
  • Print_ISBN
    978-1-4577-0180-1
  • Type

    conf

  • DOI
    10.1109/CNSI.2011.66
  • Filename
    5954309