DocumentCode
2301111
Title
Prototyping of a Network-on-Chip on Spartan 3E FPGA
Author
Viet Thang, Huynh ; Ngoc Nam, Pham
Author_Institution
Fac. of Electron. & Telecommun., Danang Univ., Danang
fYear
2008
fDate
4-6 June 2008
Firstpage
24
Lastpage
28
Abstract
This paper introduces a network-on-chip (NoC) model used for system-on-chip (SoC) applications. A basic NoC architecture (BASIC-NoC) will be proposed, synthesized and implemented on FPGA platform.
Keywords
field programmable gate arrays; logic design; network-on-chip; NoC architecture synthesis; network-on-chip prototyping; spartan 3E FPGA; system-on-chip; Delay; Field programmable gate arrays; Integrated circuit technology; Moore´s Law; Multiprocessor interconnection networks; Network synthesis; Network-on-a-chip; Paper technology; Prototypes; System-on-a-chip; FPGA; Interconnection Network; Network-on-Chip; System-on-Chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Communications and Electronics, 2008. ICCE 2008. Second International Conference on
Conference_Location
Hoi an
Print_ISBN
978-1-4244-2425-2
Electronic_ISBN
978-1-4244-2426-9
Type
conf
DOI
10.1109/CCE.2008.4578927
Filename
4578927
Link To Document