DocumentCode :
2301653
Title :
A 150 K gate 250 ps BiCMOS SOG with an emitter-follower CMOS (ECMOS) cell
Author :
Kumagai, Kouichi ; Yoshida, Kenji ; Hatano, Tsutomu ; Masuda, Hajime ; Nakazato, Hiroshi ; Tagami, Yuichi ; Mizumura, Hisashi
Author_Institution :
NEC Corp., Kanagawa, Japan
fYear :
1990
fDate :
13-16 May 1990
Abstract :
A 150 K-gate 250-ps delay time BiCMOS SOG (sea-of-gates) has been developed by applying a novel emitter-follower CMOS (ECMOS) basic cell and by using a 0.8-μm BiCMOS process with triple-level metallization. The SOG features (i) flexibility for accommodating 4-ns access-time SRAM of up to 16 kb, (ii) less than 0.5-ns clock skew in the chip, and (iii) up to 80% gate utilization
Keywords :
BIMOS integrated circuits; SRAM chips; application specific integrated circuits; cellular arrays; logic arrays; 0.8 micron; 16 kbit; 250 ps; 4 ns; ASIC; BiCMOS; SOG; SRAM; access-time; delay time; emitter follower CMOS cell; static RAM; triple-level metallization; BiCMOS integrated circuits; Bipolar transistors; CMOS process; Capacitance; Circuit simulation; Delay effects; Large scale integration; MOS devices; MOSFET circuits; Resistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference, 1990., Proceedings of the IEEE 1990
Conference_Location :
Boston, MA
Type :
conf
DOI :
10.1109/CICC.1990.124658
Filename :
124658
Link To Document :
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