DocumentCode
2302109
Title
SUB-45nm Technology and Design Challenges
Author
Knoblinger, Gerhard ; Tschanz, James W. ; Pol, Marcal
Author_Institution
Infineon Technologies
fYear
2007
fDate
39142
Firstpage
3
Lastpage
3
Keywords
CMOS technology; Circuit synthesis; Design for manufacture; Digital circuits; Electrodes; FETs; Heating; Radio frequency; Semiconductor device modeling; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Quality Electronic Design, 2007. ISQED '07. 8th International Symposium on
Conference_Location
San Jose, CA, USA
Print_ISBN
0-7695-2795-7
Type
conf
DOI
10.1109/ISQED.2007.153
Filename
4148995
Link To Document