• DocumentCode
    2303014
  • Title

    Power Delivery Aware Floorplanning for Voltage Island Designs

  • Author

    Cai, Yici ; Liu, Bin ; Shi, Jin ; Zhou, Qiang ; Hong, Xianlong

  • Author_Institution
    Dept. of Comput. Sci. & Technol., Tsinghua Univ., Beijing
  • fYear
    2007
  • fDate
    26-28 March 2007
  • Firstpage
    350
  • Lastpage
    355
  • Abstract
    Voltage island has become a very effective design style for power saving by assigning different supply voltages to different modules. However, the new design style also brings forward new challenges, especially to the designer of P/G networks. In this paper, we study the power delivery problem in voltage island designs, and propose to consider voltage drop during the floorplanning process to reduce design iterations. We have implemented a floorplanner supporting voltage islands with special considerations on power delivery integrity. Our analysis shows that it is unnecessary to consider the pitch of the P/G network in the floorplan stage. Using this strategy to guide our new floorplaner, we can get more robust low power design under almost the same run time. Experimental results have demonstrated the effectiveness of our approach
  • Keywords
    integrated circuit design; integrated circuit interconnections; low-power electronics; P/G network; design style; low power design; power delivery aware floorplanning; power saving; reduced design iterations; voltage drop; voltage island designs; Algorithm design and analysis; Circuits; Computer science; Electricity supply industry; Energy consumption; Power supplies; Process design; Robustness; Timing; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Quality Electronic Design, 2007. ISQED '07. 8th International Symposium on
  • Conference_Location
    San Jose, CA
  • Print_ISBN
    0-7695-2795-7
  • Type

    conf

  • DOI
    10.1109/ISQED.2007.121
  • Filename
    4149060