Bit synchronization and viterbi equalization for GSM BTS — Hardware implementation on TMS320C6424 TI DSP

This paper demonstrates the simulation and implementation of bit synchronization and viterbi equalization for Global System for Mobile communication (GSM) system on TMS320C6424 DSP. GSM makes use of Training Sequence for channel estimation and ISI (inter symbol interference) cancellation by use of viterbi equalizer. Modulated Baseband in-phase(I) and quadrature-phase(Q) signals are generated using Agilent E4438C Vector signal generator and faded using PCI Fader cards in PC, is used as input to DSP. BER performance of unprotected (ClassII) bits meets the GSM standard. Matlab simulation has been done for algorithm verification. Hardware implementation is done using fixed point C. Prototyped our design in Texas Instrument TMS320C6424 DSP and verified using Agilent E4438C Vector signal generator and fader simulator for all propagation models as per GSM standard. The design and hardware implementation of this Demodulator was done for CDOT indigenous SGRAN (Shared GSM Radio Access Network) BTS (Base Transceiver Station) project.