• DocumentCode
    230388
  • Title

    Ge CMOS: Breakthroughs of nFETs (Imax=714 mA/mm, gmax=590 mS/mm) by recessed channel and S/D

  • Author

    Heng Wu ; Mengwei Si ; Lin Dong ; Jingyun Zhang ; Ye, Peide D.

  • Author_Institution
    Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
  • fYear
    2014
  • fDate
    9-12 June 2014
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    We report a new approach to realize the Ge CMOS technology based on the recessed channel and source/drain (S/D). Both junctionless (JL) nFETs and pFETs are integrated on a common GeOI substrate. The recessed S/D process greatly improves the Ge n-contacts. A record high maximum drain current (Imax) of 714 mA/mm and trans-conductance (gmax) of 590 mS/mm, high Ion/Ioff ratio of 1×105 are archived at channel length (Lch) of 60 nm on the nFETs. Scalability studies on Ge nFETs are conducted in sub-100 nm region down to 25 nm for the first time. Considering the Fermi level (EF) pining near the valence band edge (EV) of Ge, a novel hybrid CMOS structure with the inversion-mode (IM) Ge pFET and the JL accumulation-mode (JAM) Ge nFET is proposed.
  • Keywords
    CMOS integrated circuits; Fermi level; elemental semiconductors; germanium; valence bands; CMOS technology; Fermi level pining; Ge; high maximum drain current; junctionless nFET; junctionless pFET; recessed channel technology; source-drain technology; valence band edge; CMOS integrated circuits; CMOS technology; Contact resistance; Logic gates; Nickel; Silicon; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology (VLSI-Technology): Digest of Technical Papers, 2014 Symposium on
  • Conference_Location
    Honolulu, HI
  • ISSN
    0743-1562
  • Print_ISBN
    978-1-4799-3331-0
  • Type

    conf

  • DOI
    10.1109/VLSIT.2014.6894374
  • Filename
    6894374