Modeling stresses in ultra-thin flip chips

Author

Marjamaki, P. ; Reinikainen, T. ; Kivilahti, J.

Author_Institution

Lab. of Electron. Prod. Technol., Helsinki Univ. of Technol., Espoo, Finland

fYear

2000

fDate

2000

Firstpage

24

Lastpage

27

Abstract

In the present study the effect of chip thickness on life expectancy of solder joints and on stresses in the chip in an underfilled flip chip assembly was investigated with FE analysis. By reducing the thickness of the silicon chip expected lifetime of the joints increased markedly. The life expectancies of the solderjoint based on energy method were 700, 860 and 1060 cycles for 600, 60 and 30 μm thick chips, respectively. However, the reduction of the chip thickness increased normal stresses in the chip significantly. In the case of the thickest chip the highest compressive stress in the chip was about 90 MPa, while in the case of the thinnest chip it was about 290 MPa. So, by reducing the thickness the reliability of the solder joints increases but high stresses may cause reliability problems in the active chip

Keywords

finite element analysis; flip-chip devices; integrated circuit packaging; integrated circuit reliability; internal stresses; soldering; stress analysis; 30 to 600 micron; FE analysis; FEM; Si; Si chip; chip thickness; compressive stress; life expectancy; normal stresses; reliability; solder joints; stress modelling; ultra-thin flip chips; underfilled flip chip assembly; Assembly; Compressive stress; Elasticity; Flip chip; Laboratories; Production; Silicon; Soldering; Thermal stresses; Viscosity;

fLanguage

English

Publisher

ieee

Conference_Titel

Adhesive Joining and Coating Technology in Electronics Manufacturing, 2000. Proceedings. 4th International Conference on

Conference_Location

Espoo

Print_ISBN

0-7803-6460-0

Type

conf

DOI

10.1109/ADHES.2000.860567

Filename

860567