Title :
Redundant Via Insertion in Restricted Topology Layouts
Author_Institution :
IBM Microelectron. Div., Essex Junction, VT
Abstract :
In this paper, the authors describe the application of redundant via insertion (RV) to the restricted topologies proposed for gridded and alternating phase shift mask layouts. Adding redundant vias has been shown to improve the yield and reliability of designs. The paper shows that it is possible to successfully add redundant vias, provided that the gridded layer is adjacent to a layer that can receive the additional layout complexity of the off-direction routing necessary to add additional vias. The authors compare a static method for via insertion that does not move existing wires with a dynamic method that shifts wires to make space for additional vias
Keywords :
integrated circuit layout; masks; network routing; reliability; alternating phase shift mask layouts; gridded layer; off-direction routing; redundant via insertion; reliability; restricted topology layouts; static method; Bipartite graph; Design for manufacture; Manufacturing; Microelectronics; Rivers; Routing; Shape; Topology; Wires; Wiring;
Conference_Titel :
Quality Electronic Design, 2007. ISQED '07. 8th International Symposium on
Conference_Location :
San Jose, CA
Print_ISBN :
0-7695-2795-7
DOI :
10.1109/ISQED.2007.138