Low-cost CMOS algorithmic digital-analogue convertor for high-frequency applications

Author

Franca, J. ; Vital, J.

Author_Institution

Dept. of Electr. Eng. & Comput., Inst. Superior Tecnico, Lisbon, Portugal

fYear

1990

fDate

13-16 May 1990

Abstract

A novel, low-cost digital-analog convertor (DAC) circuit suitable for high-frequency applications has been designed and integrated using a 2.5-μm CMOS technology. The convertor uses a purely passive parasitic-compensated switched-capacitor circuit to implement a conversion algorithm consisting of a mere charge division between equal-valued capacitors. The output voltage signal directly related to the equivalent charge of the converted digital word is produced by means of a charge-to-voltage conversion circuit which is designed to become insensitive to both the offset and finite DC gain of the amplifier. The analog active area of the integrated DAC is 0.25 mm²

Keywords

CMOS integrated circuits; digital-analogue conversion; switched capacitor networks; 2.5 micron; CMOS technology; algorithmic digital-analogue convertor; charge division; charge-to-voltage conversion circuit; equal-valued capacitors; high-frequency applications; integrated DAC; low cost DAC; passive parasitic-compensated; switched-capacitor circuit; Application software; Application specific integrated circuits; CMOS technology; Consumer electronics; Converters; Integrated circuit technology; Signal design; Switched capacitor circuits; Switching circuits; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 1990., Proceedings of the IEEE 1990

Conference_Location

Boston, MA

Type

conf

DOI

10.1109/CICC.1990.124676

Filename

124676