Designing for signal integrity in high speed systems

Designers of high speed digital systems are familiar with the concept of AC noise margin which encompasses simultaneous switching, reflections, and crosstalk. Designing for first incident switching and timing accuracy are common parameters. However, as system frequencies increase, these guidelines are not adequate to ensure fault free system operation. In addition to guaranteeing first incident switching and restricting the plateauing of the transition edges in the threshold region, “area of vulnerability” criteria has been identified. This criteria guarantees the integrity of the circuit´s signal over the critical portion of its cycle time and evaluates the sharpness of the transition edges. Not only does this reduce the likelihood of false switching and intermittent noise problems, it increases the accuracy of the timing equations which is essential in high speed systems. This technique also has the flexibility to emphasize different criteria depending on the system requirements