Fine pitch TAB assembly technology for 820 pin ceramic PGA single point bonding technology at room temperature

A new ceramic pin grid array (PFA) package for industrial computers has been developed by applying tape automated bonding (TAB) technology to one of the largest (20 mm square) and highest pin count (820 pins) application specific integrated circuits (ASIC) available in the semiconductor industry. To fabricate this package. A series of TAB assembly processes containing inner lead bonding (ILB), cutting and forming of TAB outer leads, solder sheet mounting, outer lead bonding (OLB), die attachment and lid sealing have been developed. Gang inner lead bonding is being used for LSIs with a minimum electrode pitch of 80 μm and a maximum chip size of 15 mm square. The problems of thermal deformation of bonding tools and of curved surfaces of large chips give limitations to the reduction of bonding pitch and the enlargement of chip size. Gang inner lead bonding of a large chip (20 mm square) has been achieved by lessening tool surface deformation. On the other hand, gang outer lead bonding to a ceramic substrate has not been possible for large size LSIs, because of the waviness of the ceramic substrate. The key to this assembly is that a single point bonding method at room temperature has been developed for fine pitch (90 μm pitch) interconnections between TAB outer leads and electrode pads on a wavy ceramic substrate. To realize single point TAB technology, the optimum design for a tape carrier and for electrode pad patterns on a ceramic substrate has been explored, a new bonding tool has been developed, and the optimum thickness of gold, plated on the electrode pads on the ceramic substrate, has been investigated