A new design for precision clock synchronization based on FPGA

NTP and IEEE1588 are two widely used protocols for clock synchronization in large distributed systems. NTP has its limitation that the synchronization accuracy is normally no better than 1 millisecond. The realization of the IEEE1588 system needs expensive components such as high-end microcontrollers or dedicated 1588 network hardware. This paper puts forward a method based on FPGA and short broadcast frames to realize a high level of synchronization accuracy between the master node clock and slave node clocks. When the master starts to synchronize, it sends a synchronous broadcast frame and memorizes this starting time in master clock. Each FPGA of the slave nodes, which needs to be synchronized, immediately returns a local node information frame as soon as it received the broadcast frame. FPGA in the master measures and memorizes the return moment of each node information frame precisely, and then calculates the correct value for each node. According to these correct values, slave nodes modify the local time to make it consistent with the master clock. The experiment result, which is done with LVDS data signal on shot wire 10 cm and long wire 55 m, shows that the synchronization accuracy is better than 200 nanoseconds, and the system can maintain the synchronization accuracy for a long time. The measured values of clock offset between master and slave node clock match well with the theoretical values. Experiments show that this design based on FPGA can save CPU resources and transmission bandwidth effectively for a large distributed system.