DocumentCode :
2309404
Title :
Concurrent test planning
Author :
Van Wagenen, Bethany ; Seng, Edward
Author_Institution :
Teradyne, Inc., North Reading, MA, USA
fYear :
2010
fDate :
2-4 Nov. 2010
Firstpage :
1
Lastpage :
10
Abstract :
Testing multiple device functions in parallel can yield significant test time and cost of test reductions. This paper discusses the planning process and algorithms required to realize an efficient and achievable concurrent test plan.
Keywords :
automatic test equipment; automatic test pattern generation; automatic test software; automatic test equipment; concurrent test planning; multiple device functions; parallel; planning algorithms; planning process; test reductions; test time;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference (ITC), 2010 IEEE International
Conference_Location :
Austin, TX
ISSN :
1089-3539
Print_ISBN :
978-1-4244-7206-2
Type :
conf
DOI :
10.1109/TEST.2010.5699255
Filename :
5699255
Link To Document :
بازگشت