DocumentCode
2309500
Title
Practical active compensation techniques for ATE power supply response for testing of mixed signal data storage SOCs
Author
Basharapandiyan, Suri ; Cai, Yi
Author_Institution
LSI, Inc., Allentown, PA, USA
fYear
2010
fDate
2-4 Nov. 2010
Firstpage
1
Lastpage
7
Abstract
We will demonstrate the effectiveness of power supply active compensation techniques in mixed signal device performance testing. Read channel speed sorting for data storage SOCs is used to illustrate how we minimize the power transient effect in ATE test, where read-channel current draw varies drastically between different mission-modes and power-saving-modes. These active compensation ideas are critical when decoupling improvement alone cannot reduce the transients to acceptable levels. Compared to other publications, we are focusing on minimizing large device functionality-induced transients; instead of peak power consumption with ATPG generated tests.
Keywords
automatic test equipment; automatic test pattern generation; power supplies to apparatus; system-on-chip; ATE power supply response; ATPG generated tests; data storage SoC; decoupling improvement; device functionality induced transients; mission modes; mixed signal data storage; mixed signal device performance testing; peak power consumption; power saving modes; power supply active compensation; power transient effect; practical active compensation; read channel speed sorting; read-channel current;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference (ITC), 2010 IEEE International
Conference_Location
Austin, TX
ISSN
1089-3539
Print_ISBN
978-1-4244-7206-2
Type
conf
DOI
10.1109/TEST.2010.5699263
Filename
5699263
Link To Document