Vendor-agnostic native compression engine

Have you ever had the problem of trying to determine what compression technique to use from which tool vendor and what to do if any of that changes during the design flow? This paper will present a DFT architecture and automation solution that provides flexibility for designs using scan compression. It combines generic and proprietary techniques to enhance testability, reduce design risk, and improve development time. Data and results for the use of this technique in a microprocessor chip will also be presented.