DocumentCode
2311069
Title
Current control buffer for multi switching CMOS SOG
Author
Tomioka, Ichiro ; Hyozo, Masahiko ; Okabe, Masatomi ; Kishida, Satoru ; Arakawa, Takahiko ; Kuramitsu, Yoichi
Author_Institution
Mitsubishi Electr. Corp., Hyogo, Japan
fYear
1990
fDate
13-16 May 1990
Abstract
To overcome the noise problem in current sub-micron CMOS sea of gates (SOG), an output buffer circuit for the noise reduction is proposed. A current controlling buffer (CCB) reduces the noise spike down to approximately 1/10 of conventional output buffers. The advantage of CCB is verified by the simultaneous switching of 150 output buffers (12 mA type) on 0.8 μm 184 K-gate CMOS SOG. The noise reduction rate and transition times of three CCB options are shown. The maximum value of 88% which seems to sufficient for multi switching of over 100 buffers
Keywords
CMOS integrated circuits; VLSI; logic arrays; 0.8 micron; 12 mA; current control buffer; current controlling buffer; multi switching CMOS SOG; noise reduction; noise spike reduction; output buffer circuit; simultaneous switching; sub-micron CMOS sea of gates; transition times; CMOS process; CMOS technology; Capacitance; Circuit noise; Crosstalk; Current control; Inductance; Noise reduction; Voltage; Working environment noise;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 1990., Proceedings of the IEEE 1990
Conference_Location
Boston, MA
Type
conf
DOI
10.1109/CICC.1990.124715
Filename
124715
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