A novel copper plating formula for through silicon holes filling in a center-up mode

In recent years, through wafer electrical connections have become important roles, which will be used in developing high-speed, compact 3D microelectronic devices in next generation. Although the electroplating copper is a well-established process, completely void-free electroplating in through silicon holes (TSH) with a high aspect ratio remains a big challenge. Naturally, local current distribution is not uniform from the hole opening to the hole center during traditional electroplating. Therefore, voids were easily formed in TSH after traditional electroplating. In this paper, using this center-up technique, we demonstrate successful filling of though holes with an aspect ratio of 7.6. A novel copper plating formula composed of a special inhibitor achieved void-free copper could fill in TSH. Due to this special adsorption and inhibition of the new additive (VF-S), that have resulted in a concentration gradient of VF-S from the hole opening to the center, the center-up filling mode was carried out, meaning that copper pillars can be directly formed by copper electroplating without the need of a conducting template assembly.