Abstract :
The following topics are dealt with: reconfigurable hardware security challenges; IP protection; trusted embedded platform; nonscan design-for-test methodology; security checkers; formal security evaluation; TrustGeM; flexible architecture optimization; ASIC implementation; systematic security evaluation method; TeSR; robust temporal self-referencing approach; side-channel analysis; secure architecture; industrial session; physical unclonable function and fault attacks.
Keywords :
IP networks; fault diagnosis; formal verification; reconfigurable architectures; security of data; ASIC implementation; IP protection; TeSR; TrustGeM; fault attack; flexible architecture optimization; formal security evaluation; industrial session; nonscan design-for-test methodology; physical unclonable function; robust temporal self referencing approach; secure architecture; security checker; side channel analysis; systematic security evaluation method; trusted embedded platform;
Conference_Titel :
Hardware-Oriented Security and Trust (HOST), 2011 IEEE International Symposium on
Conference_Location :
San Diego CA
Print_ISBN :
978-1-4577-1059-9
DOI :
10.1109/HST.2011.5954985
