DocumentCode
2311944
Title
A coreless technology overview for packaging substrates
Author
Hsu, Byron ; Ho, Chung W. ; Lee, Francis ; Chen, Tsung-yuan
fYear
2010
fDate
20-22 Oct. 2010
Firstpage
1
Lastpage
4
Abstract
The rational of using the coreless technology to build packaging substrates versus the conventional core approach is first described. Substrate structures are compared to illustrate the simplicity and advantages of the coreless approach over that of the core. Coreless product examples, including the design rules are shown for both the ABF and the BT/Hitachi materials. Developmental results of the coreless technology indicated that the panels are stable and the electrical performance is superior to that of the core technology approach.
Keywords
electronics packaging; ABF materials; BT-Hitachi materials; conventional core approach; coreless technology; packaging substrates; Copper; Dielectrics; Flip chip; Process control; Substrates; Tin;
fLanguage
English
Publisher
ieee
Conference_Titel
Microsystems Packaging Assembly and Circuits Technology Conference (IMPACT), 2010 5th International
Conference_Location
Taipei
ISSN
2150-5934
Print_ISBN
978-1-4244-9783-6
Electronic_ISBN
2150-5934
Type
conf
DOI
10.1109/IMPACT.2010.5699535
Filename
5699535
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