A 1/4 inch format 250 K pixel amplified MOS image sensor using CMOS process

Author

Kawashima, H. ; Andoh, F. ; Murata, N. ; Tanaka, K. ; Yamawaki, M. ; Taketoshi, K.

Author_Institution

ULSI Lab., Mitsubishi Electr. Corp., Hyogo, Japan

fYear

1993

fDate

5-8 Dec. 1993

Firstpage

575

Lastpage

578

Abstract

A 1/4 inch format 250K pixel amplified MOS image sensor has been developed with the CMOS process. We have developed a new circuit technique using a 0.8 /spl mu/m design rule to achieve reduction of pixel size while realizing vertical two line mixing and high sensitivity. Considering high speed operation and stacking photoconversion layers, we have designed scanner circuits and photodiode potential. As a result, a dynamic range of 75 dB and a sensitivity of 1.8 /spl mu/ A/lx have been attained at a pixel size of 7.2(H)/spl times/5.6(V)/spl mu/ m/sup 2/. Also we confirmed high speed operation up to a HDTV data rate.<>

Keywords

CMOS integrated circuits; image sensors; integrated circuit technology; 0.25 inch; 0.8 micron; 250 pixel; 5.6 micron; 7.2 micron; CMOS process; HDTV; amplified MOS image sensor; circuit technique; design rule; dynamic range; high speed operation; photodiode potential; pixel size; scanner circuits; sensitivity; stacking photoconversion layers; vertical two line mixing; CMOS process; Circuits; HDTV; Image processing; Image sensors; Laboratories; MOSFETs; Photodiodes; Pixel; Stacking;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1993. IEDM '93. Technical Digest., International

Conference_Location

Washington, DC, USA

ISSN

0163-1918

Print_ISBN

0-7803-1450-6

Type

conf

DOI

10.1109/IEDM.1993.347237

Filename

347237