Water-related threshold voltage instability of polysilicon TFTs

Author

Okuyama, K. ; Kubota, K. ; Hashimoto, T. ; Ikeda, S. ; Koike, A.

Author_Institution

Process Eng. Dev. Dept., Hitachi Ltd., Tokyo, Japan

fYear

1993

fDate

5-8 Dec. 1993

Firstpage

527

Lastpage

530

Abstract

Negative bias-temperature (NBT) instability of polysilicon thin film transistors (TFTs) has been studied. We found water is strongly related to this phenomenon and can result in a threshold voltage shift of 1 V or more within a short time under NBT stress. This paper shows the results supporting this fact and proves, by using thin LPCVD SiN films, the suppression of water penetration and/or content in the oxides is essential in reducing this instability to an acceptable level. A qualitative model is presented to explain the role of water and experimental results.<>

Keywords

elemental semiconductors; humidity; insulated gate field effect transistors; moisture; semiconductor device models; silicon; stability; thin film transistors; Si-SiO/sub 2/-BPSG-SiN; Si-SiO2-B2O3-P2O5-SiO2-SiN; model; negative bias-temperature instability; polysilicon TFTs; thin LPCVD SiN films; thin film transistors; threshold voltage instability; water penetration suppression; water-related instability; Crystallization; Degradation; Insulation; MOSFETs; Semiconductor device modeling; Silicon compounds; Stress; Testing; Thin film transistors; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1993. IEDM '93. Technical Digest., International

Conference_Location

Washington, DC, USA

ISSN

0163-1918

Print_ISBN

0-7803-1450-6

Type

conf

DOI

10.1109/IEDM.1993.347295

Filename

347295